NXP Semiconductors PXN2020, Reference Manual, Page: 1206 / 1376

Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
36-56 Freescale Semiconductor
Figure 36-41. Data Write Message Format
Data Read Messages
The data read message contains the data read value and the address of the read access, relative to the
previous data trace message. Data read message information is messaged out in the following format:
Figure 36-42. Data Read Message Format
NOTE
The e200z6 Z5XX based CPUs are capable of generating two (2) reads or
writes per clock cycle in cases where multiple registers are accessed with a
single instruction (lmw/stmw). These have a double word pair size encoding
(
DSZ = 0b000). In these cases, the Nexus3 module sends one (1) Data Trace
Message with the two 32-bit data values as one combined 64-bit value for
each message.
For the e200z6 based CPU, the double-word encoding (data size = 0b000)
indicates a double-word access and is sent out as a single data trace message
with a single 64-bit data value.
The debug/development tool needs to distinguish the two cases based on the
family of Zen processor.
DTM Overflow Error Messages
An error message occurs when a new message cannot be queued due to the message queue being full. The
FIFO discards incoming messages until it has completely emptied the queue. Once emptied, an error
message is queued. The error encoding indicates which types of messages attempted to be queued while
the FIFO was being emptied.
If only a data trace message attempts to enter the queue while it is being emptied, the error message
incorporates the data trace only error encoding (00010). If both OTM and data trace messages attempt to
enter the queue, the error message incorporates the OTM and data trace error encoding (00111). If a
watchpoint also attempts to be queued while the FIFO is being emptied, then the error message
incorporates error encoding (01000).
DATA
MSB LSB
2 3 4
U-ADDR DSZ SRC
5
4 bits
1
TCODE (000101)
3 bits 1–32 bits 1–64 bits 6 bits
Max length = 109 bits; Min length = 15 bits
DATA
MSB LSB
2 3 4
U-ADDR DSZ SRC
5
4 bits
1
TCODE (000110)
3 bits 1–32 bits 1–64 bits 6 bits
Max length = 109 bits; Min length = 15 bits