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Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
6-12
Freescale Semiconductor
6.2.2.8
Z6 Reset Vector Register (CRP_Z6VEC)
The CRP_Z6VEC register contains:
•
Recovery vector for the Z6 core
•
Reset for the Z6 core
•
VLE select for the Z6 core
NOTE
The user may attempt to set both the CRP_Z6VEC[Z6RST] and
CRP_Z0VEC[Z0RST] bits to 1, but if one of these bits is already set to a
value of 1, the write to the other bit is blocked.
6.2.2.9
Z0 Reset Vector Register (CRP_Z0VEC)
The CRP_Z0VEC register contains:
Table 6-9. CRP_PWKSRCF Field Descriptions
Field
Description
PWKSRCFn
Pin Wakeup Source Flag. The PWKSRCF bits indicate which external pin wakeup source event caused the
wakeup. More than one external wakeup source can be asserted at a time if the wakeup events happened
simultaneously. A write of 1 clears the interrupt flag. A write of 0 has no effect.
0 PWKSRCFn did not cause the last wakeup.
1 PWKSRCFn caused the last wakeup.
Offset: CR 0x0050
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
21
22
23
24
25
26
27
28
29
30
31
R
Z6VEC
0
0
0
0
0
0
0
0
0
0
Z6RST VLE
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0
0
0
0
0
0
0
0
0
0
0
1
Figure 6-10. Z6 Reset Vector Register (CRP_Z6VEC)
Table 6-10. CRP_Z6VEC Field Descriptions
Field
Description
Z6VEC
The user needs to change this value to point to a different memory location for system reinitialization when
exiting low-power sleep mode. The program counter value for the Z6 after Sleep mode recovery is
{Z6VEC, 0xFFC}, which aligns to a 4 KB address boundary offset by 0xFFC. Note that the default Z6 MMU
configuration is a 4 KB memory space aligned to the 4 KB address boundary defined by Z6VEC. Thus the
reinitialization code needs to access within the 4 KB memory space until the MMU is reconfigured.
Z6RST
Controls the assertion of RESET to the Z6 core. Writes to this bit cause the Z6 to immediately enter/exit reset.
Reads of this bit indicate if the core is being held in reset.
0 Z6 not in reset.
1 Z6 in reset.
VLE
VLE Select. The VLE bit selects whether the Z6 recovers into VLE or Book_E mode.
0 Z6 recovers into Book_E mode.
1 Z6 recovers into VLE mode.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...