Fast Ethernet Controller (FEC)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
25-13
(provided ECR[ETHER_EN] is also set). Once the FEC polls a receive descriptor whose empty bit is not
set, the FEC clears R_DES_ACTIVE and ceases receive descriptor ring polling until the user sets the bit
again, signifying that additional descriptors have been placed into the receive descriptor ring.
The RDAR register is cleared at reset and when ECR[ETHER_EN] is cleared.
25.3.4.5
Transmit Descriptor Active Register (TDAR)
The TDAR is a command register that should be written by the user to indicate that the transmit descriptor
ring has been updated (transmit buffers have been produced by the driver with the ready bit set in the buffer
descriptor).
Whenever the register is written, the X_DES_ACTIVE bit is set. This value is independent of the data
actually written by the user. When set, the FEC polls the transmit descriptor ring and processes transmit
frames (provided ECR[ETHER_EN] is also set). Once the FEC polls a transmit descriptor whose ready bit
is not set, the FEC clears X_DES_ACTIVE and ceases transmit descriptor ring polling until the user sets
the bit again, signifying additional descriptors have been placed into the transmit descriptor ring.
The TDAR register is cleared at reset, when ECR[ETHER_EN] is cleared, or when ECR[RESET] is set.
Offset: FE 0x0010
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0 0
0
0
0
0
0
R_DES_ACTIVE
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 25-4. Receive Descriptor Active
Register (RDAR)
Table 25-6. RDAR Field Descriptions
Field
Description
0–6
Reserved, should be cleared.
R_DES_ACTIVE Set to one when this register is written, regardless of the value written. Cleared by the FEC device whenever
no additional “empty” descriptors remain in the receive ring. Also cleared when ECR[ETHER_EN] is
cleared.
8–31
Reserved, should be cleared.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...