FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-16
Freescale Semiconductor
NOTE
The system memory base address must be set before the controller is
enabled.
The system memory base address registers define the base address of the FlexRay memory within the
system memory. The base address is used by the BMIF to calculate the physical memory address for
system memory accesses.
26.5.2.6
Strobe Signal Control Register (STBSCR)
This register is used to assign the individual protocol timing related strobe signals given in
to
the external strobe ports. Each strobe signal can be assigned to at most one strobe port. Each write access
to registers overwrites the previously written ENB and STBPSEL values for the signal indicated by SEL.
If more than one strobe signal is assigned to one strobe port, the current values of the strobe signals are
combined with a binary OR and presented at the strobe port. If no strobe signal is assigned to a strobe port,
the strobe port carries logic 0. For more detailed and timing information refer to
NOTE
In single channel device mode, channel B related strobe signals are
undefined and should not be assigned to the strobe ports.
Base + 0x0006
Write: Disabled Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SMBA[15:4]
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-5. System Memory Base Address Low Register (SYMBADLR)
Table 26-10. SYMBADR Field Descriptions
Field
Description
SMBA
System Memory Base Address — This is the value of the system memory base address for the individual
message buffers and sync frame table. This is the value of the system memory base address for the receive
FIFO if the FIFO address mode bit MCR[FAM] is set to 1. It is defines as a byte address.
Base + 0x0008
16-bit write access required
Write: Anytime
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
SEL
0
0
0
ENB
0
0
STBPSEL
W WMD
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...