NXP Semiconductors PXN2020, Reference Manual, Page: 1371 / 1376

Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor A-113
A.3 e200z6 Core SPR Numbers
0x004C UM1—User multiple input signature register 1 R/W 0x0000_0000 12.3.2.15/12-26
0x0050 UM2—User multiple input signature register 2 R/W 0x0000_0000 12.3.2.15/12-26
0x0054 UM3—User multiple input signature register 3 R/W 0x0000_0000 12.3.2.15/12-26
0x0058 UM4—User multiple input signature register 4 R/W 0x0000_0000 12.3.2.15/12-26
0x0048 – 0x3FFF Reserved
0xFFFF_C000
BAM
Chapter 9, Boot Assist Module (BAM)
0x3FFC BAM reset vector—first executed address after the reset R —
3
9.3.1/9-3
0x3000 BAM start address R —
3
9.3.1/9-3
0x3004 Internal boot start address R —
3
9.3.1/9-3
0x3008 External boot start address R —
3
9.3.1/9-3
0x300C Parallel loader/serial boot start address R —
3
9.3.1/9-3
1
In this column, R/W indicates a read/write register, R indicates a read-only register, and W indicates a write-only register. Note
that R/W registers may contain some read-only or write-only bits.
2
In this column, the symbol “U” indicates one or more bits in a byte are undefined at reset. See the associated description for
more information.
3
Reset value is indeterminate.
4
Some bits are read-only.
5
See register description for reset value.
6
See specific register description.
Table A-5. e200z6 Core SPR Numbers (Supervisor Mode)
Register Description SPR (decimal)
General Registers
XER Integer Exception Register 1
LR Link Register 8
CTR Count Register 9
GPR0–GPR31 General Purpose Registers N/A
Special Purpose Registers
SPRG0 Special Purpose Register 0 272
SPRG1 Special Purpose Register 1 273
SPRG2 Special Purpose Register 2 274
SPRG3 Special Purpose Register 3 275
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register Access
1
Reset Value
2
Section/Page