
Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-14
Freescale Semiconductor
0x0088
DSPI_RXFR3—DSPI receive FIFO register 3
R
0x0000_0000
30.3.2.9/30-22
0x008C–0x00B8
Reserved
DSI Registers
0x00BC
DSPI_DSICR—DSPI DSI configuration register
R/W
0x0000_0000
30.3.2.10/30-23
0x00C0
DSPI_SDR—DSPI DSI serialization data register
R
0x0000_0000
30.3.2.11/30-24
0x00C4
DSPI_ASDR—DSPI DSI alternate serialization data register
R/W
0x0000_0000
30.3.2.12/30-25
0x00C8
DSPI_COMPR—DSPI DSI transmit comparison register
R
0x0000_0000
30.3.2.13/30-26
0x00CC
DSPI_DDR—DSPI DSI deserialization data register
R
0x0000_0000
30.3.2.14/30-26
0x00D0
DSPI_DSICR1—DSPI DSI TSB configuration register 1
R/W
0x0000_0000
30.3.2.15/30-27
0x00D4–0x3FFF
Reserved
0xC3F9_8000–
0xC3F9_FFFF
Reserved
0xC3FA_0000
eSCI_J
Chapter 31, Enhanced Serial Communication Interface (eSCI)
0x0000
eSCI_BRR—eSCI baud rate register
R/W
0x0004
31.3.2.1/31-6
0x0002
eSCI_CR1—eSCI control register 1
R/W
0x0000
31.3.2.2/31-6
0x0004
eSCI_CR2—eSCI control register 2
R/W
0x0200
31.3.2.3/31-8
0x0006
eSCI_SDR—eSCI data register
R/W
0x0000
31.3.2.4/31-10
0x0008
eSCI_IFSR1—eSCI interrupt flag and status register 1
R/W
0x8000
31.3.2.5/31-11
0x000A
eSCI_IFSR2—eSCI interrupt flag and status register 2
R/W
0x0000
31.3.2.6/31-12
0x000C
eSCI_LCR1—eSCI LIN control register 1
R/W
0x0000
31.3.2.7/31-13
0x000E
eSCI_LCR2—eSCI LIN control register 2
R/W
0x0000
31.3.2.8/31-15
0x00010
eSCI_LTR— eSCI LIN transmit register
R/W
0x0000
31.3.2.9/31-15
0x0012
Reserved
0x0014
eSCI_LRR—eSCI LIN receive register
R/W
0x0000
31.3.2.10/31-17
0x0016
Reserved
0x0018
eSCI_LPR—eSCI LIN CRC polynomial register
R/W
0xC599
31.3.2.11/31-18
0x001A
eSCI_CR3—eSCI control register 3
R/W
0x0000
31.3.2.12/31-18
0x001C–0x3FFF
Reserved
0xC3FA_4000
eSCI_K
Chapter 31, Enhanced Serial Communication Interface (eSCI)
0x0000
eSCI_BRR—eSCI baud rate register
R/W
0x0004
31.3.2.1/31-6
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...