NXP Semiconductors PXN2020, Reference Manual, Page: 352 / 1376

Flash Memory Array and Control
PXN20 Microcontroller Reference Manual, Rev. 1
12-26 Freescale Semiconductor
12.3.2.14 User Test Register 2 (UT2)
12.3.2.15 User Multiple Input Signature Register [0:4] (UMn)
The User Multiple Input Signature Registers (UM n ) provide a means to evaluate array integrity.
Offset: FLASH_REG 0x0044 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
DAI
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
DAI
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 12-16. User Test Register 2 (UT2)
Table 12-18. UT2 Field Descriptions
Field Description
DAI
[63:32]
Data Array Input. These bits enable checks of ECC logic by allowing data bits to be input into the ECC logic
and then read out by doing array reads or array integrity checks. The DAI[63:32] correspond to the 32 Array
bits representing Word 1of the double word selected in the ADR register.
Offset FLASH_REG 0x0048 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MISR[31:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 12-17. User Multiple Input Signature Register 0 (UM0)
Offset FLASH_REG 0x004C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MISR[63:32]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 12-18. User Multiple Input Signature Register 1 (UM1)
Offset FLASH_REG 0x0050 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MISR[95:64]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 12-19. User Multiple Input Signature Register 2 (UM2)