NXP Semiconductors PXN2020, Reference Manual, Page: 1231 / 1376

Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 36-81
Table 36-55 shows the mapping of RWD bytes to byte lanes of the AHB read and write data buses.
36.7.7.6 Watchpoint Trigger Register (WT)
The watchpoint trigger register allows the watch points defined within the e200z0 Nexus1 logic to trigger
actions. These watch points can control program trace enable and disable. The WT bits can be used to
produce an address related ‘window’ for triggering trace messages.
Table 36-56 details the watchpoint trigger register fields.
Table 36-55. RWD data placement for Transfers
Transfer Size and
byte offset
RWA[2:0]
RWD
31:24 23:16 15:8 7:0
Byte @000 000 — — — AHB[7:0]
Byte @001 001 — — — AHB[15:8]
Byte @010 010 — — — AHB[23:16]
Byte @011 011 — — — AHB[31:24]
Half@000 000 — — AHB[15:8] AHB[7:0]
Half@010 010 - - AHB[31:24] AHB[23:16]
Word@000 000 AHB[31:24] AHB[23:16] AHB[15:8] AHB[7:0]
Nexus Reg: 0xB Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
PTS PTE
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 36-59. Watchpoint Trigger Register (WT)