NXP Semiconductors PXN2020, Reference Manual, Page: 615 / 1376

PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 26-1
Chapter 26
FlexRay Communication Controller (FlexRAY)
26.1 Introduction
26.1.1 Reference
The following documents are referenced.
• FlexRay Communications System Protocol Specification, Version 2.1 Rev A
• FlexRay Communications System Electrical Physical Layer Specification, Version 2.1 Rev A
26.1.2 Glossary
This section provides a list of terms used in the description of the controller.
Table 26-1. List of Terms
Term Definition
BCU Buffer Control Unit. Handles message buffer access.
BMIF Bus Master Interface. Provides master access to FlexRay Memory block.
CC Communication Controller
CDC Clock Domain Crosser
CHI Controller Host Interface
Cycle length in

T The actual length of a cycle in

T for the ideal controller (+/- 0 ppm)
EBI External Bus Interface
FlexRay Memory Memory Window to store message buffer payload, header, status, and synchronization frame
related tables.
System Memory Memory that is contains the FlexRay Memory
System Bus Bus that connects the controller and System Memory
FSS Frame Start Sequence
HIF Host Interface. Provides host access to controller.
Host The FlexRay CC host MCU
LUT Look Up Table. Stores message buffer header index value.
MB Message Buffer
MBIDX Message Buffer Index: the position of a header field entry within the header area. If the header area
is accessed as an array, this is the same as the array index of the entry.
MBNum Message Buffer Number: Position of message buffer configuration registers within the register map.
For example, Message Buffer Number 5 corresponds to the MBCCS5 register.
MCU Microcontroller Unit