NXP Semiconductors PXN2020, Reference Manual, Page: 157 / 1376

Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 6-25
NOTE
TDO is pulled high on entry into low power mode. It is driven low when the
MCU wakes up.
The assertion of the TDO pin indicates to the debug tool that it can now restore the debug register contents
via the JTAG interface. The Nexus pins cannot be used until the NPC configuration is restored. The TDO
pin remains asserted until the debug tool sets the NPC PCR[SLEEP_SYNC] bit. At that point, TDO is
negated, control of the pin given back to the JTAG controller, and the wakeup interrupt is asserted to the
Z0 and Z6 cores. A block diagram of the SOC blocks and the connections between them to support debug
on sleep wakeup is given in
Figure 6-19 .
NOTE
The CRP enables only the debug pins that were enabled prior to sleep mode
entry.
Figure 6-19. Sleep Mode Debug Block Integration
6.4 Real-Time Counter (RTC)
The RTC is a free-running counter used for time-keeping applications. The RTC may be configured to
generate an interrupt at a pre-defined interval independent of the mode of operation. If in sleep mode when
the RTC interval is reached, the RTC first generates a wakeup, and then asserts the interrupt request.
16 MHz
Z0 Core
Z6 Core
CRP
NPC
TCK
TCK
TCLK
sleep reset
debug req
debug req
debug enable
debug enable
16 MHz IRC
npc_lp_dbg
nexus port enables
Pad
Remaining Nexus & JTAG Pins
nexus pad control
TDO
tool handshake
TDO
FSM
TDO
IRC