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Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
36-24
Freescale Semiconductor
To write control data to NPC tool-mapped registers, the following sequence is required:
1. Write the 7-bit register index and set the write bit to select the register with a pass through the
SELECT-DR-SCAN path in the TAP controller state machine.
2. Write the register value with a second pass through the SELECT-DR-SCAN path. Note that the
prior value of this register is shifted out during the write.
To read status and control data from NPC tool-mapped registers, the following sequence is required:
1. Write the 7-bit register index and clear the write bit to select register with a pass through
SELECT-DR-SCAN path in the TAP controller state machine.
2. Read the register value with a second pass through the SELECT-DR-SCAN path. Data shifted in
is ignored.
See the IEEE
-ISTO 5001-2003 standard for more detail.
36.6
e200z6 Class 3 Nexus Module ()
The module provides real-time development capabilities for the device core in compliance with
the IEEE
-ISTO Nexus 5001-2003 standard. This module provides development support capabilities
without requiring the use of address and data pins for internal visibility.
A portion of the pin interface (the JTAG port) is also shared with the OnCE / Nexus 1 unit. The
IEEE-ISTO 5001-2003
standard defines an extensible auxiliary port which is used in conjunction with
the JTAG port in e200z6 processors.
36.6.1
Introduction
This section defines the auxiliary pin functions, transfer protocols and standard development features of
the module. The development features supported are Program Trace, Data Trace, Watchpoint
Messaging, Ownership Trace, and Read/Write access via the JTAG interface. The module also
supports two Class 4 features: Watchpoint Triggering and Processor Overrun Control.
NOTE
Throughout this section references are made to the auxiliary port and its
specific signals, such as MCKO, MSEO[1:0], MDO[11:0] and others. In
actual use, the device NPC module arbitrates the access of the single
auxiliary port. To simplify the description of the function of the
module, the interaction of the NPC is omitted and the behavior described as
if the module has its own dedicated auxiliary port.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...