NXP Semiconductors PXN2020, Reference Manual, Page: 799 / 1376

Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 27-27
various parameters and control the operation of the MLB Device. The registers are accessed
through the peripheral bus.
• MLB Channel Buffer. Implements the interface between the MLB Device and a single-port
SRAM. Functionality of the MLB Channel Buffer logic block includes:
— Buffering of logical channel data for bus latency issues
— Multiplexing of logical channel data in Big- and Little-Endian mode
— Implementation of hardware loop-back mode between logical channel 0 (RX) and logical
channel 1 (TX)
• MLB Channel Arbiter. Functions as the Host Bus master and is responsible for handling requests
from the MLB DMA Controller. Some of the Channel Arbiter functionality includes:
— Operating as a bus-master for DMA accesses to/from system memory
— Determining priorities of channel DMA requests
— Granting requests based on round-robin arbitration
— Routing data and control information between MLB logical channels and the Host Bus
interface, and consolidating channel interrupts
The MLB physical layer interfaces directly to the Media local bus. MediaLB is based on a scalable 3-pin
interface (MLBCLK, MLBSIG, MLBDAT) designed to operate at a maximum operating frequency of
1024 Fs (49.152 MHz at 48 kHz). The MediaLB topology supports communication among the MediaLB
controller (INIC) and other MediaLB devices. The MediaLB controller interfaces directly with the MOST
network. The MediaLB interface consists of the MLBCLK clock line, a bi-directional MLBSIG line for
signal information and a bi-directional MLBDAT line for data transfer.
The MediaLB topology supports one network controller connected to one or more devices, where the
controller is the interface between the MediaLB devices and the MOST network. The controller also
generates the MediaLB clock source MLBCLK, that is synchronized to the MOST network and provides
the timing for the entire MediaLB interface. The MLBCLK continues to operate even when the MediaLB
controller loses lock with the MOST network.
The MLBSIG line is a multiplexed signal which carries the ChannelAddress generated by the MediaLB
controller, as well as the Command and RxStatus bytes from the MediaLB devices. The MediaLB
controller incorporates MediaLB device functionality. The ChannelAddress indicates which device can
transmit and which device or devices receive on a particular logical channel.
The MLBDAT line is driven by the transmitting MediaLB device and is received by all other MediaLB
devices including the MediaLB controller. The MLBDAT line carries the actual data (synchronous,
asynchronous, isochronous, or control). For synchronous stream data transmission, multiple MediaLB
devices can receive the same data, in a broadcast fashion. The transmitting MediaLB device indicates the
particular type of data transmitted by sending the appropriate command on the MLBSIG line. The
commands supported are determined by the MediaLB device’s link layer.
When receiving signals over the bus, the physical layer first detects the framesync information in the
bitstream. The physical layer then captures the control and data information and converts it to a parallel
format to be passed to the link layer. When detecting the framesync information in the bitstream the
physical layer may also place data on the bus that has been converted from its native parallel format to the