NXP Semiconductors PXN2020, Reference Manual, Page: 804 / 1376

Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
27-32 Freescale Semiconductor
27.4.6 DMA Controller (Ping-Pong Buffering)
Using the MLB DMA Controller with ping-pong buffering dictates a particular method used for
transferring data between hardware channels and system memory. When the MLB hardware channels are
configured in this mode, the CCBCR
n and CNBCR n registers are used to configure and monitor the
system memory Current Buffer and Next Buffer , respectively.
Channels use ping-pong buffering when CECR n [MDS[1:0]] = 00. The Current Buffer and Next Buffer are
independent system memory buffers, which allow hardware to support the ping-pong buffering. Each is
addressed using two 16-bit address pointers, as follows:
• Buffer Start Address (CNBCR n [BSA]) – defines the beginning address of the Next Buffer in
system memory
• Buffer End Address (CNBCR n [BEA]) – determines the end of the Next Buffer in system memory
• Buffer Current Address (CCBCR n [BCA]) – defines the beginning of the Current Buffer in system
memory
• Buffer Final Address (CCBCR n [BFA]) – defines the end of the Current Buffer in system memory
27.4.6.1 Asynchronous and Control Packet Handling
The Current Buffer and Next Buffer can be configured for either multi-packet or single-packet buffering,
when receiving and transmitting asynchronous and control packet data. Multi-packet buffering allows the
system to reduce the interrupt load at the expense of larger system memory buffers. Single-packet
buffering allows system memory buffer size to be reduced at the expense of increasing the interrupt rate.
An example of multi-packet buffering for asynchronous and control channels is provided in Figure 27-19 .