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Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-26
Freescale Semiconductor
0x0220
MBCCSR36–Message buffer configuration, control, status
register 36
R/W
0x0000
0x0222
MBCCFR36–Message buffer cycle counter filter register 36
R/W
—
0x0224
MBFIDR36–Message buffer frame ID register 36
R/W
0x0UUU
0x0226
MBIDXR36–Message buffer index register 36
R/W
0x00UU
0x0228
MBCCSR37–Message buffer configuration, control, status
register 37
R/W
0x0000
0x022A
MBCCFR37–Message buffer cycle counter filter register 37
R/W
—
0x022C
MBFIDR37–Message buffer frame ID register 37
R/W
0x0UUU
0x022E
MBIDXR37–Message buffer index register 37
R/W
0x00UU
0x0230
MBCCSR38–Message buffer configuration, control, status
register 38
R/W
0x0000
0x0232
MBCCFR38–Message buffer cycle counter filter register 38
R/W
—
0x0234
MBFIDR38–Message buffer frame ID register 38
R/W
0x0UUU
0x0236
MBIDXR38–Message buffer index register 38
R/W
0x00UU
0x0238
MBCCSR39–Message buffer configuration, control, status
register 39
R/W
0x0000
0x023A
MBCCFR39–Message buffer cycle counter filter register 39
R/W
—
0x023C
MBFIDR39–Message buffer frame ID register 39
R/W
0x0UUU
0x023E
MBIDXR39–Message buffer index register 39
R/W
0x00UU
0x0240
MBCCSR40–Message buffer configuration, control, status
register 40
R/W
0x0000
0x0242
MBCCFR40–Message buffer cycle counter filter register40
R/W
—
0x0244
MBFIDR40–Message buffer frame ID register 40
R/W
0x0UUU
0x0246
MBIDXR40–Message buffer index register 40
R/W
0x00UU
0x0248
MBCCSR41–Message buffer configuration, control, status
register 41
R/W
0x0000
0x024A
MBCCFR41–Message buffer cycle counter filter register 41
R/W
—
0x024C
MBFIDR41–Message buffer frame ID register 41
R/W
0x0UUU
0x024E
MBIDXR41–Message buffer index register 41
R/W
0x00UU
0x0250
MBCCSR42–Message buffer configuration, control, status
register 42
R/W
0x0000
0x0252
MBCCFR42–Message buffer cycle counter filter register 42
R/W
—
0x0254
MBFIDR42–Message buffer frame ID register 42
R/W
0x0UUU
0x0256
MBIDXR42–Message buffer index register 42
R/W
0x00UU
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...