NXP Semiconductors PXN2020, Reference Manual, Page: 1130 / 1376

Analog-to-Digital Converter (ADC)
PXN20 Microcontroller Reference Manual, Rev. 1
34-50 Freescale Semiconductor
The logic configuration for selecting the threshold values for the analog watchdog is shown in
Figure 34-50 . After the conversion of the selected channel a comparison is performed between the
converted value obtained and the threshold values set. The result is stored as WDG n H and WDG n L bits
in the WTISR register as explained in Table 34-43 . Depending on the MSKWDG n L and MSKWDG n H
mask bits in the WTIMR register, an interrupt is generated on threshold violation.
Figure 34-49. Alternate Watchdog Threshold Configuration
Figure 34-50. Guarded Area
Table 34-43. Values of WDGnH and WDGnL Fields
WDGnH WDGnL Converted data
1 0 converted data > THRH
0 1 converted data < THRL
0 0 THRH < converted data < THRL
THRHn
THRH_ALTn
0
1
THRHn
THRH_ALTn
0
1
Analog Watchdog n
Upper Threshold for conversion
Lower Threshold for conversion
alternate_wdgbus(x)
Setting Upper and Lower Threshold values for the analog watchdog [n = (0 ... 3)]
THRH
THRL
Analog Voltage
Upper threshold
Lower threshold
Guarded area