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Enhanced Direct Memory Access Controller (eDMA)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
24-25
Table 24-20. TCDn Field Descriptions
Bits /
Word Offset
[n:n]
Name
Description
0–31 /
0x0 [0:31]
SADDR
[0:31]
Source address. Memory address pointing to the source data.
Word 0x0, bits 0–31.
32–36 /
0x4 [0:4]
SMOD
[0:4]
Source address modulo.
0
Source address modulo feature is disabled.
non-0 This value defines a specific address range that is specified to be the value after
SADDR + SOFF calculation is performed or the original register value. The setting
of this field provides the ability to easily implement a circular data queue. For data
queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size
address and the SMOD field should be set to the appropriate value for the queue,
freezing the desired number of upper address bits. The value programmed into
this field specifies the number of lower address bits that are allowed to change. For
this circular queue application, the SOFF is typically set to the transfer size to
implement post-increment addressing with the SMOD function constraining the
addresses to a 0-modulo-size range.
37–39 /
0x4 [5:7]
SSIZE
[0:2]
Source data transfer size.
000 8-bit
001 16-bit
010 32-bit
011 64-bit
100 Reserved
101 32-byte (4-beat 64-bit burst)
110 Reserved
111 Reserved
The attempted specification of a reserved encoding causes a configuration error.
40–44 /
0x4 [8:12]
DMOD
[0:4]
Destination address modulo. See the SMOD[0:5] definition.
45–47 /
0x4 [13:15]
DSIZE
[0:2]
Destination data transfer size. See the SSIZE[0:2] definition.
48–63 /
0x4 [16:31]
SOFF
[0:15]
Source address signed offset. Sign-extended offset applied to the current source
address to form the next-state value as each source read is completed.
64
0x8 [0]
SMLOE
1
0
Source minor loop offset enable
This flag selects whether the minor loop offset is applied to the source address upon
minor loop completion.
0 The minor loop offset is not applied to the source address.
1 The minor loop offset is applied to the source address.
65
0x8 [1]
DMLOE
1
1
Destination minor loop offset enable
This flag selects whether the minor loop offset is applied to the destination address upon
minor loop completion.
0 The minor loop offset is not applied to the destination address.
1 The minor loop offset is applied to the destination address.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...