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Controller Area Network (FlexCAN)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
29-9
c
29.3.3
Rx FIFO Structure
When the FEN bit is set in the CAN
x
_MCR, the memory area from 0x80 to 0xFC(which is normally
occupied by MBs 0 to 7) is used by the reception FIFO engine.
shows the Rx FIFO data
structure. The region 0x80–0x8C contains an MB structure which is the port through which the CPU reads
0110
OVERRUN: A frame was
overwritten into a full buffer.
0010
If the code indicates OVERRUN but the CPU reads
the C/S word and then unlocks the MB, when a new
frame is written to the MB the code returns to FULL.
0110
If the code already indicates OVERRUN, and yet
another new frame must be written, the MB is
overwritten again, and the code remains OVERRUN.
Refer to
Section 29.4.4, Matching Process,
for details
about overrun behavior.
0XY1
1
BUSY: FlexCAN is updating the
contents of the MB. The CPU
must not access the MB.
0010
An EMPTY buffer was written with a new frame (XY
was 01).
0110
A FULL/OVERRUN buffer was overwritten (XY was
11).
1
Note that for Tx MBs (see
), the BUSY bit should be ignored on read, except when AEN bit is set in the CANx_MCR.
Table 29-5. Message Buffer Code for Tx Buffers
RTR
Initial Tx
Code
Code after
Successful
Transmission
Description
X
1000
—
INACTIVE: MB does not participate in the arbitration process.
X
1001
—
ABORT: MB was configured as Tx and CPU aborted the transmission. This code is
only valid when AEN bit in CANx_MCR is asserted. MB does not participate in the
arbitration process.
0
1100
1000
Transmit data frame unconditionally once. After transmission, the MB automatically
returns to the INACTIVE state.
1
1100
0100
Transmit remote frame unconditionally once. After transmission, the MB
automatically becomes and Rx MB with the same ID.
0
1010
1010
Transmit a data frame whenever a remote request frame with the same ID is
received. This MB participates simultaneously in both the matching and arbitration
processes. The matching process compares the ID of the incoming remote request
frame with the ID of the MB. If a match occurs this MB is allowed to participate in the
current arbitration process and the CODE field is automatically updated to 1110 to
allow the MB to participate in future arbitration runs. When the frame is eventually
transmitted successfully, the Code automatically returns to 1010 to restart the
process again.
0
1110
1010
The MBM generates this code as a result of match to a remote request frame. The
data frame is transmitted unconditionally once and then the code automatically
returns to ‘1010’. The CPU can also write this code with the same effect.
Table 29-4. Message Buffer Code for Rx Buffers (continued)
Rx Code before
Rx New Frame
Description
Rx Code after
Rx New Frame
Comment
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...