NXP Semiconductors PXN2020, Reference Manual, Page: 266 / 1376

Boot Assist Module (BAM)
PXN20 Microcontroller Reference Manual, Rev. 1
9-12 Freescale Semiconductor
NOTE
In the PXN20 , the SRAM is protected by 64-bit wide error correction code
(ECC). In the general case, this means any write to uninitialized SRAM
must be 64 bits wide, otherwise an ECC error may occur. Therefore the
BAM buffers downloaded data until 8 bytes have been received, and then
does a single 64-bit wide write. Only system RAM supports 64-bit writes;
therefore, attempting to download data to other RAM apart from system
RAM will cause errors. If the start address of the downloaded data is not on
an 8-byte boundary, the BAM will write 0x0000 to the memory locations
from the proceeding 8-byte boundary to the start address (maximum
4 bytes). The BAM will also write 0x0000 to all memory locations from the
last byte of data downloaded to the following 8 byte boundary (maximum
7 bytes).
4. Switch to the loaded code.
The BAM program waits for the last echo message transmission to complete, then the active
communication controller is disabled. Its pins revert to GPIO inputs. The BAM code passes control
to the loaded code at start address, which was received in step 2 of the protocol.
NOTE
The code that is downloaded and executed must periodically refresh the
platform watchdog timer or change the timeout period to a value that will
not cause resets during normal operation.
The serial download protocol is summarized in Table 9-9 and Table 9-10 .
Table 9-9. CAN Serial-Boot Mode Download Protocol
Protocol
Step
Host Sent Message
BAM Response
Message
Action
1 CAN ID 64-bit
password
CAN ID 64-bit
password
Password checked for validity and compared against
stored password. Platform watchdog timer is refreshed
if the password check is successful.
2 CAN ID 32-bit store
a VLE bit + 31-bit
number of bytes
CAN ID 32-bit
store a VLE bit
+ 31-bit number of bytes
Load address and size of download are stored for future
use. The VLE bit determines whether the MMU entry for
the SRAM, EBI, and flash is configured to run Book E or
VLE code.
3 CAN ID 8 to 64 bits of
raw binary data
CAN ID 8 to 64
bits of raw binary data
Each byte of data received is stored in MCU memory,
starting at the address specified in the previous step
and incrementing until the amount of data received and
stored, matches the size as specified in the previous
step.
4 None None The BAM returns IO pins to their reset state, disables
FlexCAN_A module and then branches to the first
address the data was stored to (As specified in step 2).