NXP Semiconductors PXN2020, Reference Manual, Page: 770 / 1376

FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-156 Freescale Semiconductor
The availability of data in the transmit buffer is indicated by the commit bit MBCCSR t [CMT] and the lock
bit MBCCSR t [LCKS].
The receive message buffer has the message buffer number r and has following configuration
Furthermore the assumption is that both message buffers are enabled (MBCCSR t [EDS] = 1 and
MBCCSR r [EDS] = 1)
NOTE
The cycle set {4n + 2} = {2,6,10,...} is assigned to the receive buffer only.
The cycle set {4n} = {0,4,8,12,...} is assigned to both buffers.
Table 26-120. Transmit Buffer Configuration
Register Field Value Description
MBCCSRt
MCM - used only for double buffers
MBT 0 single transmit buffer
MTD 1 transmit buffer
MBCCFRt
MTM 0 event transition mode
CHA 1 assigned to channel A
CHB 0 not assigned to channel B
CCFE 1 cycle counter filter enabled
CCFMSK 000011
cycle set = {4n} = {0,4,8,12,...}
CCFVAL 000000
MBFIDRt FID S assigned to slot S
Table 26-121. Receive Buffer Configuration
Register Field Value Description
MBCCSRr
MCM — n/a
MBT — n/a
MTD 0 receive buffer
MBCCFr
MTM — n/a
CHA 1 assigned to channel A
CHB 0 not assigned to channel B
CCFE 1 cycle counter filter enabled
CCFMSK 000001
cycle set = {2n} = {0,2,4,6,...}
CCFVAL 000000
MBFIDRr FID S subscribed slot