
Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-32
Freescale Semiconductor
0x0370
MBCCSR78–Message buffer configuration, control, status
register 78
R/W
0x0000
0x0372
MBCCFR78–Message buffer cycle counter filter register 78
R/W
—
0x0374
MBFIDR78–Message buffer frame ID register 78
R/W
0x0UUU
0x0376
MBIDXR78–Message buffer index register 78
R/W
0x00UU
0x0378
MBCCSR79–Message buffer configuration, control, status
register 79
R/W
0x0000
0x037A
MBCCFR79–Message buffer cycle counter filter register 79
R/W
—
0x037C
MBFIDR79–Message buffer frame ID register 79
R/W
0x0UUU
0x037E
MBIDXR79–Message buffer index register 79
R/W
0x00UU
0x0380
MBCCSR80–Message buffer configuration, control, status
register 80
R/W
0x0000
0x0382
MBCCFR80–Message buffer cycle counter filter register 80
R/W
—
0x0384
MBFIDR80–Message buffer frame ID register 80
R/W
0x0UUU
0x0386
MBIDXR80–Message buffer index register 80
R/W
0x00UU
0x0388
MBCCSR81–Message buffer configuration, control, status
register 81
R/W
0x0000
0x038A
MBCCFR81–Message buffer cycle counter filter register 81
R/W
—
0x038C
MBFIDR81–Message buffer frame ID register 81
R/W
0x0UUU
0x038E
MBIDXR81–Message buffer index register 81
R/W
0x00UU
0x0390
MBCCSR82–Message buffer configuration, control, status
register 82
R/W
0x0000
0x0392
MBCCFR82–Message buffer cycle counter filter register 82
R/W
—
0x0394
MBFIDR82–Message buffer frame ID register 82
R/W
0x0UUU
0x0396
MBIDXR82–Message buffer index register 82
R/W
0x00UU
0x0398
MBCCSR83–Message buffer configuration, control, status
register 83
R/W
0x0000
0x039A
MBCCFR83–Message buffer cycle counter filter register 83
R/W
—
0x039C
MBFIDR83–Message buffer frame ID register 83
R/W
0x0UUU
0x039E
MBIDXR83–Message buffer index register 83
R/W
0x00UU
0x03A0
MBCCSR84–Message buffer configuration, control, status
register 84
R/W
0x0000
0x03A2
MBCCFR84–Message buffer cycle counter filter register84
R/W
—
0x03A4
MBFIDR84–Message buffer frame ID register 84
R/W
0x0UUU
0x03A6
MBIDXR84–Message buffer index register 84
R/W
0x00UU
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...