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Boot Assist Module (BAM)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
9-13
NOTE
The BAM writes additional two zero double words to the system RAM after
loaded code to prevent possible ECC errors, which could happen because
the CPU speculatively pre-fetches data after the last loaded instruction,
where the RAM may not be initialized.
NOTE
The last loaded code address must not exceed 0x4003_FFF0 (the upper
allowed RAM address by MMU settings, minus two zero double words,
written by BAM at the end of code download).
NOTE
Serial download is unavailable to the last four words of system RAM
•
When using the BAM Serial boot download feature, the BAM initializes
an additional four 32-bit words after the end of the downloaded records.
This is done to ensure that if the core fetches the last instruction of the
downloaded code from the internal SRAM while executing the code, it
will not prefetch instructions from memory locations that have not been
initialized. If the download image has the exact same size as the internal
SRAM, the 20 bytes at the beginning of the SRAM will be written with
zero value due to incomplete memory decoding. So, when using the
serial download feature of the BAM, make sure that the maximum
address of the downloaded code does not exceed the end address of the
SRAM minus 16 bytes.
Table 9-10. eSCI Serial-Boot Mode Download Protocol
Protocol
Step
Host Sent Message
BAM Response
Message
Action
1
64-bit password MSB first
64-bit password
Password checked for validity and compared against
stored password. Platform Watchdog timer is refreshed
if the password check is successful.
2
32-bit store a VLE bit +
31-bit number of bytes (MSB
first)
32-bit store a
VLE bit + 31-bit number
of bytes
Load address and size of download are stored for future
use. The VLE bit determines whether the MMU entry for
the SRAM, EBI and Flash is configured to run Book E or
VLE code.
3
8 bits of raw binary data
8 bits of raw binary data Each byte of data received is store in MCU memory,
starting at the address specified in the previous step
and incrementing until the amount of data received and
stored, matched the size as specified in the previous
step.
4
None
None
The BAM returns IO pins to their reset state and
disables the ESCI_A module. Then it branches to the
first address the data was stored to (as specified in step
2).
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...