NXP Semiconductors K32 L2A Series, Reference Manual, Page: 93 / 1379

3.10.2.2 TSI Interrupts
The TSI has multiple sources of interrupt requests. However, these sources are OR'd
together to generate a single interrupt request. When a TSI interrupt occurs and you want
to determine the exact interrupt source, read the TSI status register.
Signal multiplexing integration
3.11.1 Signal multiplexing configuration
Information found here summarizes how the module is integrated into the device. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Register
access
Signal Multiplexing/
Port Control
Transfers
Module
Peripheral bus
controller 1
Module
Module
Ext
er
nal Pins
Transfers
Figure 3-24. Signal multiplexing integration
Table 3-31. Reference links to related information
Topic Related module Reference
Full description Port control Port control
System memory map System memory map
Clocking Clock Distribution
Register access Peripheral bus
controller
Peripheral bridge
3.11.1.1 Clock gating
See the Clock distribution chapter.
3.11
Chapter 3 Chip Configuration
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 93