NXP Semiconductors K32 L2A Series, Reference Manual, Page: 792 / 1379

Table 29-4. LPSPI Command Word in Slave Mode (continued)
Field Description
devices and only support half-duplex data formats (at least
one of TXMSK or RXMSK must also be set).
FRAMESZ Configures the number of bits in each frame to 1.
The minimum frame size is 8-bits and the maximum frame
size is 4096-bits. If the frame size is less than or equal to 32-
bits, the word size and frame size are identical. If the frame
size is greater than 32-bits, then the word size is 32-bits for
each word except the last (the last word contains the
remainder bits if the frame size is not divisible by 32). The
minimum word size is 2-bits, a frame size of 33-bits (or
similar) is not supported.
Y
The transmit FIFO must be filled with transmit data before the LPSPI_PCS input asserts,
otherwise the transmit error flag will set.
29.3.3.2 Receive FIFO and Data Match
The receive FIFO is used to store receive data during SPI bus transfers. When RXMSK is
set, receive data is discarded instead of storing in the receive FIFO.
Receive data supports a receive data match function that can match received data against
one of two words or against a masked data word. The data match function can also be
configured to compare only the first one or two received data words since the start of the
frame. Receive data that is already discarded due to RXMSK bit cannot cause the data
match to set and will delay the match on first received data word until after all discarded
data is received. The receiver match function can also be configured to discard all receive
data until a data match is detected, using the MCFGR0[RDMO] control bit. When
clearing the MCFGR0[RDMO] control bit following a data match, clear
MCFGR0[RDMO] before clearing MSR[DMF] to allow all subsequent data to be
received.
29.3.3.3 Clocked Interface
The LPSPI supports interfacing to external masters that provide only clock and data pins
(LPSPI_PCS is not required). This requires using CPHA=1, configuring the LPSPI_PCS
input to be always asserted (configure PCSPOL) and setting the AUTOPCS bit. When
AUTOPCS is set, a minimum of four LPSPI functional clock cycles (divided by
PRESCALE configuration) is required between the last LPSPI_SCK edge of one word
and the first LPSPI_SCK edge of the next word.
Functional description
K32 L2A Reference Manual, Rev. 2, 01/2020
792 NXP Semiconductors