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The Shifter Status Flag (SHIFTSTAT[SSF]) and any enabled interrupts or DMA requests
will set when data has been stored into the SHIFTBUF register from the Shifter. The flag
will clear when the data has been read from the SHIFTBUF register.
The Shifter Error Flag (SHIFTERR[SEF]) and any enabled interrupts will set when an
attempt to store data into a full SHIFTBUF register occurs (buffer overrun) or when a
mismatch occurs on a start/stop bit check. The flag can be cleared by writing it with logic
1.
22.3.1.3 Match Store Mode
When configured for Match Store mode (SHIFTCTL[SMOD]=Match Store), the shifter
will shift data in, check for a match result and store matched data into the SHIFTBUF
register when a store event is signalled by the assigned Timer. Checking for a start/stop
bit can be enabled before/after shifter data is sampled by configuring the
SHIFTCFG[SSTART], TIMCFG[TSTART] or SHIFTCFG[SSTOP], TIMCFG[TSTOP]
registers in the Shifter and Timer. Up to 16-bits of data can be compared using
SHIFTBUF[31:16] to configure the data to be matched and SHIFTBUF[15:0] to mask the
match result.
The Shifter Status Flag (SHIFTSTAT[SSF]) and any enabled interrupts or DMA requests
will set when a match occurs and matched data has been stored into the SHIFTBUF
register from the Shifter. The flag will clear when the matched data has been read from
the SHIFTBUF register.
The Shifter Error Flag (SHIFTERR[SEF]) and any enabled interrupts will set when an
attempt to store matched data into a full SHIFTBUF register occurs (buffer overrun) or
when a mismatch occurs on a start/stop bit check. The flag can be cleared by writing it
with logic 1.
22.3.1.4 Match Continuous Mode
When configured for Match Continuous mode (SHIFTCTL[SMOD]=Match Continuous),
the shifter will shift data in and continuously check for a match result whenever a shift
event is signalled by the assigned Timer. Up to 16-bits of data can be compared using
SHIFTBUF[31:16] to configure the data to be matched and SHIFTBUF[15:0] to mask the
match result.
The Shifter Status Flag (SHIFTSTAT[SSF]) and any enabled interrupts or DMA requests
will set when a match occurs. The flag will clear automatically as soon as there is no
longer a match between Shifter data and SHIFTBUF register.
Chapter 22 Flexible I/O (FlexIO)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
567
Summary of Contents for K32 L2A Series
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