NXP Semiconductors K32 L2A Series, Reference Manual, Page: 55 / 1379

3.4.7 Interrupt connections
The device has one NVIC module (NVIC0), which has peripheral interrupts assigned to
it.
There is one INTMUX module (INTMUX0), which has 4 outputs that each are given a
fixed NVIC0 vector space. INTMUX0-ch0-3 has 4 dedicated vector slots on NVIC0.
NVIC1
INTMUX1
Peripheral int
Peripheral int
NVIC0
INTMUX0
Peripheral int
Peripheral int
Figure 3-1. Interrupt Routing Block Diagram
The CPU can mask off any interrupt connected to the 32-slot NVIC0 module. The
INTMUX0 module allows:
Chapter 3 Chip Configuration
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 55