NXP Semiconductors K32 L2A Series, Reference Manual, Page: 441 / 1379

DMAx_DCHPRIn field descriptions (continued)
Field Description
Channel priority when fixed-priority arbitration is enabled
NOTE: Reset value for the channel priority field, CHPRI, is equal to the corresponding channel number
for each priority register, that is, DCHPRI7[CHPRI] = 0b111.
20.3.22 TCD Source Address (DMAx_TCDn_SADDR)
Address: 4000_8000h base + 1000h (32d × i), where i=0d to 7d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
SADDR
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset. •
DMAx_TCDn_SADDR field descriptions
Field Description
SADDR Source Address
Memory address pointing to the source data.
20.3.23 TCD Signed Source Address Offset (DMAx_TCDn_SOFF)
Address: 4000_8000h base + 1004h (32d × i), where i=0d to 7d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
SOFF
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset. •
DMAx_TCDn_SOFF field descriptions
Field Description
SOFF Source address signed offset
Sign-extended offset applied to the current source address to form the next-state value as each source
read is completed.
Chapter 20 Enhanced Direct Memory Access (eDMA)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 441