NXP Semiconductors K32 L2A Series, Reference Manual, Page: 560 / 1379

Field Function
—
21-20
TIMDEC
Timer Decrement
Configures the source of the Timer decrement and the source of the Shift clock.
00b - Decrement counter on FlexIO clock, Shift clock equals Timer output.
01b - Decrement counter on Trigger input (both edges), Shift clock equals Timer output.
10b - Decrement counter on Pin input (both edges), Shift clock equals Pin input.
11b - Decrement counter on Trigger input (both edges), Shift clock equals Trigger input.
19
—
18-16
TIMRST
Timer Reset
Configures the condition that causes the timer counter (and optionally the timer output) to be reset. In 8-
bit counter mode, the timer reset will only reset the lower 8-bits that configure the baud rate. In all other
modes, the timer reset will reset the full 16-bits of the counter.
000b - Timer never reset
001b - Reserved
010b - Timer reset on Timer Pin equal to Timer Output
011b - Timer reset on Timer Trigger equal to Timer Output
100b - Timer reset on Timer Pin rising edge
101b - Reserved
110b - Timer reset on Trigger rising edge
111b - Timer reset on Trigger rising or falling edge
15
—
14-12
TIMDIS
Timer Disable
Configures the condition that causes the Timer to be disabled and stop decrementing.
000b - Timer never disabled
001b - Timer disabled on Timer N-1 disable
010b - Timer disabled on Timer compare
011b - Timer disabled on Timer compare and Trigger Low
100b - Timer disabled on Pin rising or falling edge
101b - Timer disabled on Pin rising or falling edge provided Trigger is high
110b - Timer disabled on Trigger falling edge
111b - Reserved
11
—
10-8
TIMENA
Timer Enable
Configures the condition that causes the Timer to be enabled and start decrementing.
000b - Timer always enabled
001b - Timer enabled on Timer N-1 enable
010b - Timer enabled on Trigger high
011b - Timer enabled on Trigger high and Pin high
100b - Timer enabled on Pin rising edge
101b - Timer enabled on Pin rising edge and Trigger high
110b - Timer enabled on Trigger rising edge
111b - Timer enabled on Trigger rising or falling edge
7-6
—
5-4
TSTOP
Timer Stop Bit
Table continues on the next page...
Memory Map and Registers
K32 L2A Reference Manual, Rev. 2, 01/2020
560 NXP Semiconductors