NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1223 / 1379

48.1.3.3.6.2 Function
The TRNG0 Poker Square Calculation Result Register is a read-only register used to read
the result of the TRNG Statistical Check Poker Test's Square Calculation. This test starts
with the TRNG0_PKRMAX value and decreases towards a final result, which is read
here. For the Poker Test to pass, this final result must be less than the programmed
TRNG0_PKRRNG value. Note that this offset (0x0C) is used as TRNG0_PKRMAX if
TRNG0_MCTL[PRGM] is 1. If TRNG0_MCTL[PRGM] is 0, this offset is used as
TRNG0_PKRSQ readback register, as described here.
48.1.3.3.6.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
Reserved
PKR_SQ
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R PKR_SQ
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
48.1.3.3.6.4 Fields
Field Function
31-24
—
23-0
PKR_SQ
Poker Square Calculation Result.
During the TRNG Statistical Checks, a "Poker Test" is run which starts with the value
TRNG0_PKRMAX[PKR_MAX]. This value decreases according to a "sum of squares" algorithm, and
must remain greater than zero, but less than the TRNG0_PKRRNG[PKR_RNG] limit. The resulting value
may be read through this register, if TRNG0_MCTL[PRGM] bit is 0. Note that if TRNG0_MCTL[PRGM] bit
is 1, this register address is used to access the Poker Test Maximum Limit in register TRNG0_PKRMAX,
as defined in the previous section.
48.1.3.3.7 TRNG0 Seed Control (TRNG0_SDCTL)
Chapter 48 SA-TRNG Standalone
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1223