NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1102 / 1379

43.2.5 Flash Configuration Register 2 (SIM_FCFG2)
This is read only register, any write to this register will cause transfer error.
Address: 4007_4000h base + 1050h offset = 4007_5050h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0 MAXADDR0 1
Reserved
1 Reserved
W
Reset 0 * * * * * * * 1 0 1 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
* Notes:
MAXADDR0 field: Device specific value indicating amount of implemented flash. •
SIM_FCFG2 field descriptions
Field Description
31
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
30–24
MAXADDR0
Max Address lock
• MAXADDR0 field concatenated with 13 trailing zeroes indicates the first invalid address of program
flash block 0.
• MAXADDR0 field concatenated with 13 trailing zeroes , then doubled, indicates the first invalid
address of program flash block 1.
Table continues on the next page...
Memory map and register definition
K32 L2A Reference Manual, Rev. 2, 01/2020
1102 NXP Semiconductors