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46.2.1 TPM_EXTCLK — TPM External Clock
The rising edge of the external input signal is used to increment the TPM counter if
selected by CMOD[1:0] bits in the SC register. This input signal must be less than half of
the TPM counter clock frequency. The TPM counter prescaler selection and settings are
also used when an external input is selected.
46.2.2 TPM_CHn — TPM Channel (n) I/O Pin
Each TPM channel can be configured to operate either as input or output. The direction
associated with each channel, input or output, is selected according to the mode assigned
for that channel.
46.3 Memory Map and Register Definition
This section provides a detailed description of all TPM registers.
Attempting to access a reserved register location in the TPM memory map will generate a
bus error.
TPM memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4002_E000 Version ID Register (TPM2_VERID)
32
R
0500_0007h
4002_E004 Parameter Register (TPM2_PARAM)
32
R
4002_E008 TPM Global Register (TPM2_GLOBAL)
32
R/W
0000_0000h
4002_E010 Status and Control (TPM2_SC)
32
R/W
0000_0000h
4002_E014 Counter (TPM2_CNT)
32
R/W
0000_0000h
4002_E018 Modulo (TPM2_MOD)
32
R/W
0000_FFFFh
4002_E01C Capture and Compare Status (TPM2_STATUS)
32
R/W
0000_0000h
4002_E020 Channel (n) Status and Control (TPM2_C0SC)
32
R/W
0000_0000h
4002_E024 Channel (n) Value (TPM2_C0V)
32
R/W
0000_0000h
4002_E028 Channel (n) Status and Control (TPM2_C1SC)
32
R/W
0000_0000h
4002_E02C Channel (n) Value (TPM2_C1V)
32
R/W
0000_0000h
4002_E030 Channel (n) Status and Control (TPM2_C2SC)
32
R/W
0000_0000h
4002_E034 Channel (n) Value (TPM2_C2V)
32
R/W
0000_0000h
4002_E038 Channel (n) Status and Control (TPM2_C3SC)
32
R/W
0000_0000h
Table continues on the next page...
Memory Map and Register Definition
K32 L2A Reference Manual, Rev. 2, 01/2020
1138
NXP Semiconductors
Summary of Contents for K32 L2A Series
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