NXP Semiconductors K32 L2A Series, Reference Manual, Page: 77 / 1379

3.8.1.3 Trigger options
Each TPM has a selectable external trigger input source controlled by
TPMx_CONF[TRGSEL] to use for starting the counter and/or reloading the counter. The
options available are shown in the following table.
External trigger input source is enabled by clearing TPMx_CONF[TRGSRC] bit.
Table 3-20. TPM trigger options
TPMx_CONF[SRC] TPMx_CONF[TRGSEL] Selected source
0 00 TRGMUX_TPMx_trigger0
0 01 TRGMUX_TPMx_trigger1
0 10 TRGMUX_TPMx_trigger2
0 11 Reserved
1 00 Reserved
1 01 Channel 0 pin input capture
1 10 Channel 1 pin input capture
1 11 Channel 0 or Channel 1 pin input
capture
3.8.1.4 TPM interrupts
The TPM has multiple sources of interrupt. However, these sources are OR'd together to
generate a single interrupt request to the interrupt controller. When a TPM interrupt
occurs, read the TPM status registers to determine the exact interrupt source.
3.8.2 LPIT
3.8.2.1 LPIT/DMA periodic trigger assignments
The LPIT generates periodic trigger events to the DMA channel mux. The LPIT to the
DMAMUX trigger is configured in the Trigger MUX module (TRGMUX).
Table 3-21. LPIT0 channel assignments for periodic DMA triggering
LPIT0 channel DMA channel number
LPIT0 Channel 0 DMA0 Channel 0
LPIT0 Channel 1 DMA0 Channel 1
Chapter 3 Chip Configuration
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 77