NXP Semiconductors K32 L2A Series, Reference Manual, Page: 716 / 1379

27.2.16 Master Transmit Data Register (LPI2Cx_MTDR)
An 8-bit write to the CMD field will store the data in the Command FIFO, but does not
increment the FIFO write pointer. An 8-bit write to the DATA field will zero extend the
CMD field unless the CMD field has been written separately since the last FIFO write, it
also increments the FIFO write pointer. A 16-bit or 32-bit will write both the CMD and
DATA fields and increment the FIFO.
Address: Base a 60h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
Reserved CMD DATA
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LPI2Cx_MTDR field descriptions
Field Description
31–11
Reserved
This field is reserved.
10–8
CMD Command Data
000 Transmit DATA[7:0].
001 Receive (DATA[7:0] + 1) bytes.
010 Generate STOP condition.
011 Receive and discard (DATA[7:0] + 1) bytes.
100 Generate (repeated) START and transmit address in DATA[7:0].
101 Generate (repeated) START and transmit address in DATA[7:0]. This transfer expects a NACK to
be returned.
110 Generate (repeated) START and transmit address in DATA[7:0] using high speed mode.
111 Generate (repeated) START and transmit address in DATA[7:0] using high speed mode. This
transfer expects a NACK to be returned.
DATA Transmit Data
Performing an 8-bit write to DATA will zero extend the CMD field.
Memory Map and Registers
K32 L2A Reference Manual, Rev. 2, 01/2020
716 NXP Semiconductors