NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1142 / 1379

46.3.3 TPM Global Register (TPMx_GLOBAL)
Address: Base a 8h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
RST
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TPMx_GLOBAL field descriptions
Field Description
31–2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
1
RST
Software Reset
Reset all internal logic and registers, except the Global Register. Remains set until cleared by software.
0 Module is not reset.
1 Module is reset.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Memory Map and Register Definition
K32 L2A Reference Manual, Rev. 2, 01/2020
1142 NXP Semiconductors