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29.3.5 Peripheral Triggers
The connection of the LPSPI peripheral triggers with other peripherals are device
specific.
29.3.5.1 Output Triggers
The LPSPI generates two output triggers that can be connected to other peripherals on the
device. The frame output trigger asserts at the end of each frame (when PCS negates) and
remains asserted until PCS next asserts. The word output trigger asserts at the end of each
received word and remains asserted for one LPSPI_SCK period.
29.3.5.2 Input Trigger
The LPSPI input trigger can be selected in place of the LPSPI_HREQ input to control the
start of a LPSPI bus transfer. The input trigger must assert for longer than one LPSPI
functional clock cycle to be detected.
Functional description
K32 L2A Reference Manual, Rev. 2, 01/2020
794
NXP Semiconductors
Summary of Contents for K32 L2A Series
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