NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1009 / 1379

The functions apply across all digital pin muxing modes and individual peripherals do not
override the configuration in the Pin Control register. For example, if an I
2
C function is
enabled on a pin, that does not override the pullup or open drain configuration for that
pin.
When the Pin Muxing mode is configured for analog or is disabled, all the digital
functions on that pin are disabled. This includes the pullup and pulldown enables, output
buffer enable, input buffer enable, and passive filter enable.
The LK bit (bit 15 of Pin Control Register PCRn) allows the configuration for each pin to
be locked until the next system reset. When locked, writes to the lower half of that pin
control register are ignored, although a bus error is not generated on an attempted write to
a locked register.
The configuration of each Pin Control register is retained when the PORT module is
disabled.
Whenever a pin is configured in any digital pin muxing mode, the input buffer for that
pin is enabled allowing the pin state to be read via the corresponding GPIO Port Data
Input Register (GPIO_PDIR) or allowing a pin interrupt or DMA request to be generated.
If a pin is ever floating when its input buffer is enabled, then this can cause an increase in
power consumption and must be avoided. A pin can be floating due to an input pin that is
not connected or an output pin that has tri-stated (output buffer is disabled).
Enabling the internal pull resistor (or implementing an external pull resistor) will ensure a
pin does not float when its input buffer is enabled; note that the internal pull resistor is
automatically disabled whenever the output buffer is enabled allowing the Pull Enable bit
to remain set. Configuring the Pin Muxing mode to disabled or analog will disable the
pin’s input buffer and results in the lowest power consumption.
38.6.2 Global pin control
The two global pin control registers allow a single register write to update the lower half
of the pin control register on up to 16 pins, all with the same value. Registers that are
locked cannot be written using the global pin control registers.
The global pin control registers are designed to enable software to quickly configure
multiple pins within the one port for the same peripheral function. However, the interrupt
functions cannot be configured using the global pin control registers.
The global pin control registers are write-only registers, that always read as 0.
Chapter 38 Port Control and Interrupts (PORT)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1009