NXP Semiconductors K32 L2A Series, Reference Manual, Page: 569 / 1379

Table 22-2. Next State computation for SHIFTSTATE[STATE]=i (continued)
0 0 0 SHIFTBUFi[2:0]
0 0 1 SHIFTBUFi[5:3]
0 1 0 SHIFTBUFi[8:6]
0 1 1 SHIFTBUFi[11:9]
... ... ... ...
1 1 1 SHIFTBUFi[23:21]
Note that other shifters/timers could potentially be configured to drive the input pins of a
given state, allowing the user to create complex combinations of shifters/timers as desired
e.g. the output of a Shifter configured for logic mode could potentially be used to drive a
state machine input.
The next state transition is triggered using the Timer output selected by
SHIFTCTLi[TIMSEL] with polarity controlled by SHIFTCTLi[TIMPOL]. Note that
each state could potentially use a different Timer to trigger each next state transition,
allowing a variety of internal/external trigger sources and clocking configurations to be
used (see Timer section for more detail).
The current state pointer defaults to Shifter 0 at reset, however it can be written by the
user to select a different Shifter for the initial state. If the current state pointer selects a
Shifter which is not configured for State mode, then outputs will not be driven and a next
state transition is never triggered.
The Shifter Status Flag (SHIFTSTAT[SSF]) and any enabled interrupts or DMA requests
will set whenever the Shifter has been selected by the current state pointer. The flag will
clear when the current state pointer is updated to a different Shifter.
22.3.1.6 Logic Mode
Using logic mode enables the user to implement a small amount of programmable digital
logic within a FlexIO Shifter. This feature allows board-level glue logic to be integrated
on-chip using FlexIO hardware.
When configured for Logic mode (SHIFTCTL[SMOD]=Logic), the SHIFTBUF register
is used to implement a 5-input, 32-bit programmable logic look-up table. The following
diagram provides a detailed view of Shifter microarchitecture when configured for Logic
mode.
Chapter 22 Flexible I/O (FlexIO)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 569