NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1229 / 1379

48.1.3.3.12.1 Address
Register Offset Description
TRNG0_FRQMAX 400A501Ch Accessible at this address when
TRNG0_MCTL[PRGM] = 1]
48.1.3.3.12.2 Function
The TRNG0 Frequency Count Maximum Limit Register defines the maximum allowable
count taken by the Entropy sample counter during each Entropy sample. During any
sample period, if the count is greater than this programmed maximum, a Frequency
Count Fail is flagged in TRNG0_MCTL[FCT_FAIL] and an error is generated. Note that
this address (001C) is used as TRNG0_FRQMAX only if TRNG0_MCTL[PRGM] is 1.
If TRNG0_MCTL[PRGM] is 0, this address is used as TRNG0_FRQCNT readback
register.
48.1.3.3.12.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
Reserved FRQ_MAX
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
FRQ_MAX
W
Reset
0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0
48.1.3.3.12.4 Fields
Field Function
31-22
—
Reserved. Always 0.
21-0
FRQ_MAX
Frequency Counter Maximum Limit. Defines the maximum allowable count taken during each entropy
sample. This field is writable only if TRNG0_MCTL[PRGM] bit is 1. This field is cleared to its reset value
at POR. Note that if TRNG0_MCTL[PRGM] bit is 0, this register address is used to read the Frequency
Count result in register TRNG0_FRQCNT, as defined in the following section.
Chapter 48 SA-TRNG Standalone
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1229