NXP Semiconductors K32 L2A Series, Reference Manual, Page: 915 / 1379

MTBx0_DWT_FCT1 field descriptions (continued)
Field Description
24
MATCHED
Comparator match
If this read-only flag is asserted, it indicates the operation defined by the FUNCTION field occurred since
the last read of the register. Reading the register clears this bit.
0 No match.
1 Match occurred.
23–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
FUNCTION Function
Selects the action taken on a comparator match. If MTBDWT_COMP0 is used for a data value and
MTBDWT_COMP1 for an address value, then MTBDWT_FCT1[FUNCTION] must be set to zero. For this
configuration, MTBDWT_MASK1 can be set to a non-zero value, so the combined comparators match on
a range of addresses.
0000 Disabled.
0100 Instruction fetch.
0101 Data operand read.
0110 Data operand write.
0111 Data operand (read + write).
others Reserved. Any attempts to use this value results in UNPREDICTABLE behavior.
35.3.2.6 MTB_DWT Trace Buffer Control Register
(MTBx0_DWT_TBCTRL)
The MTBDWT_TBCTRL register defines how the watchpoint comparisons control the
actual trace buffer operation.
Recall the MTB supports starting and stopping the program trace based on the watchpoint
comparisons signaled via TSTART and TSTOP. The watchpoint comparison signals are
enabled in the MTB's control logic by setting the appropriate enable bits,
MTB_MASTER[TSTARTEN, TSTOPEN]. In the event of simultaneous assertion of
both TSTART and TSTOP, TSTART takes priority.
Address: F000_1000h base + 200h offset = F000_1200h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
NUMCOMP 0
W
Reset
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 35 Micro Trace Buffer (MTB)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 915