NXP Semiconductors K32 L2A Series, Reference Manual, Page: 342 / 1379

# r3 = mmcau_3_cmds(AESS+CA0,AESS+CA1,AESS+CA2)
movw r3, #:lower16:(0x8(AESS+CA0)<<22+(AESS+CA1)<<11+AESS+CA2)
movt r3, #:upper16:(0x8(AESS+CA0)<<22+(AESS+CA1)<<11+AESS+CA2)
# r8 = mmcau_2_cmds(AESS+CA3,AESR)
movw r8, #:lower16:(0x8(AESS+CA3)<<22+(AESR)<<11)
movt r8, #:upper16:(0x8(AESS+CA3)<<22+(AESR)<<11)
add r9, fp, $((AESC+CA0)<<2) @ r9 = mmcau_cmd(AESC+CA0)
str r3, [ip] @ sub bytes w0, w1, w2
str r8, [ip] @ sub bytes w3, shift rows
ldmia r1!, {r4-r7} @ get next 4 keys; r1++
stmia r9, {r4-r7} @ mix columns, add keys
15.7.2 Assembler equate values
The following equates ease programming of the CAU.
; CAU Registers (CAx)
.set CASR,0x0
.set CAA,0x1
.set CA0,0x2
.set CA1,0x3
.set CA2,0x4
.set CA3,0x5
.set CA4,0x6
.set CA5,0x7
.set CA6,0x8
.set CA7,0x9
.set CA8,0xA
; CAU Commands
.set CNOP,0x000
.set LDR,0x010
.set STR,0x020
.set ADR,0x030
.set RADR,0x040
.set ADRA,0x050
.set XOR,0x060
.set ROTL,0x070
.set MVRA,0x080
.set MVAR,0x090
.set AESS,0x0A0
.set AESIS,0x0B0
.set AESC,0x0C0
.set AESIC,0x0D0
.set AESR,0x0E0
.set AESIR,0x0F0
.set DESR,0x100
.set DESK,0x110
.set HASH,0x120
.set SHS,0x130
.set MDS,0x140
.set SHS2,0x150
.set ILL,0x1F0
; DESR Fields
.set IP,0x08 ; initial permutation
.set FP,0x04 ; final permutation
.set KSL1,0x00 ; key schedule left 1 bit
.set KSL2,0x01 ; key schedule left 2 bits
.set KSR1,0x02 ; key schedule right 1 bit
.set KSR2,0x03 ; key schedule right 2 bits
; DESK Field
.set DC,0x01 ; decrypt key schedule
Application/initialization information
K32 L2A Reference Manual, Rev. 2, 01/2020
342 NXP Semiconductors