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Note
Always switch to this setting prior to making any changes in
filter parameters. This resets the filter to a known state.
Switching CR0[FILTER_CNT] on the fly without this
intermediate step can result in unexpected behavior.
If CR1[SE]=1, the filter takes samples of COUTA on each positive transition of the
sample input. The output state of the filter changes when all the consecutive
CR0[FILTER_CNT] samples agree that the output value has changed.
16.3.4.2 Latency issues
The value of FPR[FILT_PER] or SAMPLE period must be set such that the sampling
period is just longer than the period of the expected noise. This way a noise spike will
corrupt only one sample. The value of CR0[FILTER_CNT] must be chosen to reduce the
probability of noisy samples causing an incorrect transition to be recognized. The
probability of an incorrect transition is defined as the probability of an incorrect sample
raised to the power of CR0[FILTER_CNT].
The values of FPR[FILT_PER] or SAMPLE period and CR0[FILTER_CNT] must also
be traded off against the desire for minimal latency in recognizing actual comparator
output transitions. The probability of detecting an actual output change within the
nominal latency is the probability of a correct sample raised to the power of
CR0[FILTER_CNT].
The following table summarizes maximum latency values for the various modes of
operation in the absence of noise. Filtering latency is restarted each time an actual output
transition is masked by noise.
Table 16-2. Comparator sample/filter maximum latencies
Mode #
CR1[
EN]
CR1[
WE]
CR1[
SE]
CR0[FILTER
_CNT]
FPR[FILT_P
ER]
Operation
Maximum latency
1
0
X
X
X
X
Disabled
N/A
2A
1
0
0
0x00
X
Continuous Mode
T
PD
2B
1
0
0
X
0x00
3A
1
0
1
0x01
X
Sampled, Non-Filtered mode
T
PD
+ T
SAMPLE
+ T
per
3B
1
0
0
0x01
> 0x00
T
PD
+ (FPR[FILT_PER] *
T
per
) + T
per
4A
1
0
1
> 0x01
X
Sampled, Filtered mode
T
PD
+ (CR0[FILTER_CNT] *
T
SAMPLE
) + T
per
4B
1
0
0
> 0x01
> 0x00
T
PD
+ (CR0[FILTER_CNT] *
FPR[FILT_PER] x T
per
) + T
per
Table continues on the next page...
Chapter 16 Comparator (CMP)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
369
Summary of Contents for K32 L2A Series
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