NXP Semiconductors K32 L2A Series, Reference Manual, Page: 47 / 1379

Table 2-1. Feature Summary (continued)
Feature Details
Clocks
System Clock Generator (SCG) SCG module with following modules.
Internal clock references 48 to 60 MHz internal IRC (FIRC) with 1.5% max. deviation across temperature
8 MHz / 2 MHz internal IRC (SIRC) with 3% max. deviation across temperature
External Crystal oscillator module XOSC
1 kHz oscillator
External crystal oscillator or
resonator Low range, low power or full-swing: 32 -40 kHz
High range, low power or full-swing: 3 - 32 MHz
External square wave input clock DC to 48 MHz
Phased-locked loop (PLL) Up to 288 MHz VCO
Human-Machine Interface (HMI)
General-purpose input/output
(GPIO) 1.71-V to 3.3-V
Default to disabled (no leakage)
Hysteresis and configurable pull direction on all input pins
Configurable slew rate and fixed drive strength on all output pins
8 pins with configurable 20 mA high current drive ability
Single cycle GPIO control via IOPORT
Touch sensor inputs (TSI) 16-channel
Selectable Single channel wakeup source available in all modes
DMA support
Pin interrupt All input Port Pins
Analog
Power management controller
(PMC) Low and high voltage warning and detect with selectable trip points
1kHz LPO
16-bit analog-to-digital SAR
converter (ADC) >24 single-ended channels for larger packages
4 differential pair (muxed)
2 "status & control", and "result" registers
DMA support
1.2-V and 2.1-V Voltage
References High accuracy configurable voltage reference to provide a stable reference for ADC
High speed comparator (CMP)
with internal 6-bit digital-to-analog
converter (DAC) 2
Up to 6 input channels
12-bit DAC 1
DMA support
16 x 12-bit data buffer, true FIFO mode available
Timers
16-bit timer/pwm module 0 (TPM0) 6 channels, basic TPM function supporting input filter, dead-time insertion and
quadrature decode
Table continues on the next page...
Chapter 2 Introduction
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 47