
Address match operation functions in the same way for both MATCH[MA1] and
MATCH[MA2] fields.
• If only one of LPUART_BAUD[MAEN1] and LPUART_BAUD[MAEN2] is
asserted, a marked address is compared only with the associated match register and
data is transferred to the receive data buffer only on a match.
• If LPUART_BAUD[MAEN1] and LPUART_BAUD[MAEN2] are asserted, a
marked address is compared with both match registers and data is transferred only on
a match with either register.
31.3.3.2.5 Idle Match operation
Idle match operation is enabled when the LPUART_BAUD[MAEN1] or
LPUART_BAUD[MAEN2] bit is set and LPUART_BAUD[MATCFG] is equal to 01. In
this function, the first character received by the LPUART_RX pin after an idle line
condition is considered an address and is compared with the associated MA1 or MA2
register. The character is only transferred to the receive buffer, and
LPUART_STAT[RDRF] is set, if the comparison matches. All subsequent characters are
considered to be data associated with the address and are transferred to the receive data
buffer until the next idle line condition is detected. If no address match occurs then no
transfer is made to the receive data buffer, and all following frames until the next idle
condition are also discarded. If both the LPUART_BAUD[MAEN1] and
LPUART_BAUD[MAEN2] bits are negated, the receiver operates normally and all data
received is transferred to the receive data buffer.
Idle match operation functions in the same way for both MA1 and MA2 registers.
• If only one of LPUART_BAUD[MAEN1] and LPUART_BAUD[MAEN2] is
asserted, the first character after an idle line is compared only with the associated
match register and data is transferred to the receive data buffer only on a match.
• If LPUART_BAUD[MAEN1] and LPUART_BAUD[MAEN2] are asserted, the first
character after an idle line is compared with both match registers and data is
transferred only on a match with either register.
31.3.3.2.6 Match On Match Off operation
Match on, match off operation is enabled when both LPUART_BAUD[MAEN1] and
LPUART_BAUD[MAEN2] are set and LPUART_BAUD[MATCFG] is equal to 10. In
this function, a character received by the LPUART_RX pin that matches MATCH[MA1]
is received and transferred to the receive buffer, and LPUART_STAT[RDRF] is set. All
subsequent characters are considered to be data and are also transferred to the receive
Functional description
K32 L2A Reference Manual, Rev. 2, 01/2020
844
NXP Semiconductors
Summary of Contents for K32 L2A Series
Page 2: ...K32 L2A Reference Manual Rev 2 01 2020 2 NXP Semiconductors...
Page 42: ...K32 L2A Reference Manual Rev 2 01 2020 42 NXP Semiconductors...
Page 122: ...Flash Memory Clock K32 L2A Reference Manual Rev 2 01 2020 122 NXP Semiconductors...
Page 158: ...Debug and security K32 L2A Reference Manual Rev 2 01 2020 158 NXP Semiconductors...
Page 174: ...Module Signal Description Tables K32 L2A Reference Manual Rev 2 01 2020 174 NXP Semiconductors...
Page 246: ...Application information K32 L2A Reference Manual Rev 2 01 2020 246 NXP Semiconductors...
Page 374: ...CMP Trigger Mode K32 L2A Reference Manual Rev 2 01 2020 374 NXP Semiconductors...
Page 384: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 384 NXP Semiconductors...
Page 592: ...Application Information K32 L2A Reference Manual Rev 2 01 2020 592 NXP Semiconductors...
Page 656: ...Functional Description K32 L2A Reference Manual Rev 2 01 2020 656 NXP Semiconductors...
Page 664: ...Functional Description K32 L2A Reference Manual Rev 2 01 2020 664 NXP Semiconductors...
Page 744: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 744 NXP Semiconductors...
Page 762: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 762 NXP Semiconductors...
Page 806: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 806 NXP Semiconductors...
Page 868: ...Integer square root K32 L2A Reference Manual Rev 2 01 2020 868 NXP Semiconductors...
Page 976: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 976 NXP Semiconductors...
Page 1012: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 1012 NXP Semiconductors...
Page 1094: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 1094 NXP Semiconductors...
Page 1132: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 1132 NXP Semiconductors...
Page 1182: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 1182 NXP Semiconductors...
Page 1290: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 1290 NXP Semiconductors...