NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1328 / 1379

USBx_USBTRC0 field descriptions
Field Description
7
USBRESET
USB Reset
Generates a hard reset to USBOTG. After this bit is set and the reset occurs, this bit is automatically
cleared.
NOTE: This bit is always read as zero. Wait two USB clock cycles after setting this bit before
accessing other USB register bit fields.
0 Normal USB module operation.
1 Returns the USB module to its reset state.
6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5
USBRESMEN
Asynchronous Resume Interrupt Enable
This bit, when set, allows the USB module to send an asynchronous wakeup event to the MCU upon
detection of resume signaling on the USB bus. The MCU then re-enables clocks to the USB module. It is
used for low-power suspend mode when USB module clocks are stopped or the USB transceiver is in
Suspend mode. Async wakeup only works in device mode.
0 USB asynchronous wakeup from suspend mode disabled.
1 USB asynchronous wakeup from suspend mode enabled. The asynchronous resume interrupt differs
from the synchronous resume interrupt in that it asynchronously detects K-state using the unfiltered
state of the D+ and D– pins. This interrupt should only be enabled when the Transceiver is
suspended.
4
VFEDG_DET
VREGIN Falling Edge Interrupt Detect
Use USB x _MISCCTRL[VFEDG_EN] to enable this bitfield.
0 VREGIN falling edge interrupt has not been detected.
1 VREGIN falling edge interrupt has been detected.
3
VREDG_DET
VREGIN Rising Edge Interrupt Detect
Use USB x _MISCCTRL[VREDG_EN] to enable this bitfield.
0 VREGIN rising edge interrupt has not been detected.
1 VREGIN rising edge interrupt has been detected.
2
USB_CLK_
RECOVERY_INT
Combined USB Clock Recovery interrupt status
This read-only field will be set to value high at 1'b1 when any of USB clock recovery interrupt conditions
are detected and those interrupts are unmasked.
For customer use the only unmasked USB clock recovery interrupt condition results from an overflow of
the frequency trim setting values indicating that the frequency trim calculated is out of the adjustment
range of the FIRC output clock.
To clear this bit after it has been set, Write 0xFF to register USB_CLK_RECOVER_INT_STATUS.
1
SYNC_DET
Synchronous USB Interrupt Detect
0 Synchronous interrupt has not been detected.
1 Synchronous interrupt has been detected.
0
USB_RESUME_
INT
USB Asynchronous Interrupt
0 No interrupt was generated.
1 Interrupt was generated because of the USB asynchronous interrupt.
Memory map/Register definitions
K32 L2A Reference Manual, Rev. 2, 01/2020
1328 NXP Semiconductors