NXP Semiconductors K32 L2A Series, Reference Manual, Page: 975 / 1379

Field Function
29
INUSE
This read-only bit indicates the peripheral is being used.
0 - Peripheral is not being used.
1 - Peripheral is being used.
28-27
—
This read-only bit field is reserved and always has the value 0.
26-24
—
This read-only bit field is reserved and always has the value 0.
23-4
—
This read-only bit field is reserved and always has the value 0.
3
—
This read-only bit field is reserved and always has the value 0.
2-0
—
This read-only bit field is reserved and always has the value 0.
36.3 Functional description
The Peripheral Clock Control (PCC) module provides clock gating and clock source
selection to each peripheral.
Each peripheral has it's own unique PCCn register that provide clock gating for the
peripheral's interface clock and where applicable it's functional clock.
Optional peripheral functional clock sources can come from the SCG (xxxDIVy_CLK) or
other modules eg LPO. Not all peripherals will make use of all available peripheral
functional clocks.
The peripheral interface clock can be either DIVSLOW_CLK or DIVCORE_CLK.
See each peripherals PCCn register for details.
Chapter 36 Peripheral Clock Control (PCC)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 975