NXP Semiconductors K32 L2A Series, Reference Manual, Page: 753 / 1379

LPITx_SETTEN field descriptions (continued)
Field Description
2
SET_T_EN_2
Set Timer 2 Enable
Writing '1' to this bit will enable the timer channel 2. This bit can be used in addition to T_EN bit in TCTRL2
register. Writing a 0 will not disable the counter. This bit will be cleared when T_EN bit in TCTRL2 is set to
'0' or '1' is written to the CLR_T_EN_2 bit in CLRTEN register.
0 No Effect
1 Enables the Timer Channel 2
1
SET_T_EN_1
Set Timer 1 Enable
Writing '1' to this bit will enable the timer channel 1. This bit can be used in addition to T_EN bit in TCTRL1
register. Writing a 0 will not disable the counter. This bit will be cleared when T_EN bit in TCTRL1 is set to
'0' or '1' is written to the CLR_T_EN_1 bit in CLRTEN register.
0 No Effect
1 Enables the Timer Channel 1
0
SET_T_EN_0
Set Timer 0 Enable
Writing '1' to this bit will enable the timer channel 0. This bit can be used in addition to T_EN bit in TCTRL0
register. Writing a 0 will not disable the counter. This bit will be cleared when T_EN bit in TCTRL0 is set to
0 or '1' is written to the CLR_T_EN_0 bit in CLRTEN register.
0 No effect
1 Enables the Timer Channel 0
Chapter 28 Low Power Interrupt Timer (LPIT)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 753