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transmitter will generate a NACK for the overflow condition every time a new byte is
received that cannot be stored in the Rx FIFO. The EMV SIM module will continually
send NACKs till the Rx FIFO is read or NACK transmit threshold is reached.
21.6.7 Protocol Timers
The EMV SIM module has several 16-bit and 32-bit timers to allow the software perform
protocol timing checks and measurements like:
• Guard Time
• Character Wait Time
• Block Wait Time
• Block Guard Time
• Work Wait Time
In addition to the above, the EMV SIM module also contains two 32-bit general purpose
counters which can be used by software for any application specific time measurement.
21.6.7.1 Transmit Guard Time
The Transmit Guard time is the number of ETUs inserted by the transmitter between each
character being transmitted. The number of ETUs is controlled by programming the
TX_GETU register. The Guard Time is measured as the time (in ETUs) between the
STOP bits of previous character and the START bit of next character.
For a Guard Time programmed as 0xFF in GETU[7:0] bits of TX_GETU register, the
transmitter inserts one STOP bit instead of two.
21.6.7.2 Character Wait Time
The EMV SIM receiver block includes a 16-bit counter that counts the number of bit
times (ETUs) between received characters (i.e. time between start bits in the consecutive
characters received). When enabled, the Character Wait Time Counter (CWT) will not
start counting until after the START bit(s) of a valid character has been received. The
counter is synchronized to the receive character bit positions so that an accurate count of
the number of ETUs between characters can be made. The Character Wait Time Counter
has a 16-bit programmable comparator. Software can write the expected number of ETUs
between characters to the comparator. If the time between characters exceeds this value,
an interrupt flag will be set and an interrupt generated if the mask is clear. The CWT can
be configured as follows:
Chapter 21 Smart Card Interface Module (EMV SIM)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
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Summary of Contents for K32 L2A Series
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