NXP Semiconductors K32 L2A Series, Reference Manual, Page: 115 / 1379

Example Peripheral Clocking - TPM
Registers
PCC_TPMn
DIV3
DIV3
DIV3
DIV3
SOSC
SPLL
FIRC
SIRC
SCG
SCG DIVSLOW
SPLLDIV3_CLK
SOSCDIV3_CLK
SIRCDIV3_CLK
FIRCDIV3_CLK
Registers
TPMn
COUNTER
DIVSLOW_CLK
Peripheral Interface Clock
Figure 5-2. Example Peripheral Clocking (TPM)
5.6 DIV1 Peripheral Clocking
For K32 L2A only the USB0 module makes use of the xxDIV1 peripheral functional
clocks. This allows the USB0 module to have its functional clock frequency independent
of other timer and serial communication peripherals.
The example below shows the main Peripheral interface clock come from the
DIVCORE_CLK output providing a direct 1:1 interface to the CPU. The PCC can then
choose one of four optional clocks from the existing four clock sources within the SCG.
The PCC can also provide inputs for clock sources external to the SCG.
Chapter 5 Clock Distribution
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 115