NXP Semiconductors K32 L2A Series, Reference Manual, Page: 867 / 1379

2. Clear CSR[DZE].
3. Read the RES register and save its value as part of the task state.
When restoring the context, special care must be taken to not initiate another divide
calculation. Specifically, CSR[DFS] must be set first before reloading the DEND and
DSOR registers. For example, the following sequence can be used for the context reload:
1. Write 0x0000_0020 to the CSR to disable the fast start mechanism.
2. Reload DEND, DSOR, CSR, and RES registers from the saved state.
Since the original context save of the control/status register is guaranteed to have
CSR[SRT] = 0, there is no divide operation initiated when this register is reloaded in step
2.
Chapter 32 Memory-Mapped Divide and Square Root (MMDVSQ)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 867