NXP Semiconductors K32 L2A Series, Reference Manual, Page: 241 / 1379

• Cycle x+1, 1st AHB data phase: A bit mask is generated based on the starting bit
position and the field width; the mask is AND'ed with the memory read data to
isolate the bit field; the resulting data is captured in a data register; the input bus
cycle is stalled
• Cycle x+2, 2nd AHB data phase: Registered data is logically right-aligned for proper
alignment and driven onto the input read data bus
NOTE
Any wait states inserted by the slave device are simply passed
through the BME back to the master input bus, stalling the
AHB transaction cycle for cycle.
13.3.2.1 Decorated load: load-and-clear 1 bit (LAC1)
This command loads a 1-bit field defined by the LSB position (b) into the core's general
purpose destination register (Rt) and zeroes the bit in the memory space after performing
an atomic read-modify-write sequence.
The extracted 1-bit data field from the memory address is right-justified and zero-filled in
the operand returned to the core.
The data size is specified by the read operation and can be byte (8-bit), halfword (16-bit)
or word (32-bit).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
i ol ac1b 0 0 1 0 - - b b b - mem_addr
i ol ac1h 0 0 1 0 - b b b b - mem_addr 0
i ol ac1w 0 0 1 0 b b b b b - mem_addr 0 0
1
1
1
0
0
0
Figure 13-8. Decorated load address: load-and-clear 1 bit
See Figure 13-8 where addr[30:29] = 01 for SRAM_U, addr[30:29] = 10 for peripherals,
addr[28:26] = 010 specifies the load-and-clear 1 bit operation, addr[25:21] is "b", the bit
identifier, and mem_addr[19:0] specifies the address offset into the space based at
0x2000_0000 for SRAM_U, and 0x4000_0000 for peripherals. The "-" indicates an
address bit "don't care".
The decorated load-and-clear 1-bit read operation is defined in the following pseudo-code
as:
rdata = iolac1<sz>(accessAddress) // decorated load-and-clear 1
tmp = mem[accessAddress & 0xE00FFFFF, size] // memory read
mask = 1 << b // generate bit mask
rdata = (tmp & mask) >> b // read data returned to core
Chapter 13 Bit Manipulation Engine2 (BME2)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 241