NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1074 / 1379

SCG_SOSCCFG field descriptions (continued)
Field Description
0 Configure crystal oscillator for low-gain operation
1 Configure crystal oscillator for high-gain operation
2
EREFS
External Reference Select
Selects the source for the external reference clock. This bit selects which clock is output from the System
OSC (SOSC) into the SCG, thus either the crystal oscillator or from an external clock input
0 External reference clock selected
1 Internal crystal oscillator of OSC selected. In VLLS0, the internal oscillator of OSC is disabled even if
SOSCEN=1 and SOSCSTEN=1.
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
42.2.11 Slow IRC Control Status Register (SCG_SIRCCSR)
Address: 4007_B000h base + 200h offset = 4007_B200h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
SIRCSEL
SIRCVLD
LK
Reserved
W
Reset 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved 0
SIRCLPEN
SIRCSTEN
SIRCEN
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
Memory Map/Register Definition
K32 L2A Reference Manual, Rev. 2, 01/2020
1074 NXP Semiconductors